{"id":133,"date":"2017-09-06T12:47:11","date_gmt":"2017-09-06T10:47:11","guid":{"rendered":"https:\/\/www.hsu-hh.de\/ti\/?page_id=133"},"modified":"2019-02-26T12:59:05","modified_gmt":"2019-02-26T11:59:05","slug":"publications","status":"publish","type":"page","link":"https:\/\/www.hsu-hh.de\/ti\/en\/publications","title":{"rendered":"Publications"},"content":{"rendered":"\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
Year<\/th>\nType<\/th>\nAuthors<\/th>\nPublication<\/th>\n<\/th>\n<\/tr>\n<\/thead>\n
2017<\/td>\nConference<\/td>\nEckert,Meyer,Klauer,Haase<\/td>\nComparison and evaluation of cache parameters for softcores on FPGAs, 2017 International Conference on FPGA Reconfiguration for General-Purpose Computing (FPGA4GPC),<\/td>\n<\/td>\n<\/tr>\n
2016<\/td>\nConference<\/td>\nHaase,Meyer,Eckert,Klauer<\/td>\nWireless sensor\/actuator device configuration by NFC, 2016 IEEE International Conference on Industrial Technology (ICIT), Teipei, Taiwan<\/td>\n<\/td>\n<\/tr>\n
2016<\/td>\nConference<\/td>\nMeyer,Haase,Eckert,Klauer<\/td>\nGeneric Operating-System Support for FPGAs, International Conference on FPGA Reconfiguration for General-Purpose Computing 2016, Hamburg, Germany<\/td>\n<\/td>\n<\/tr>\n
2016<\/td>\nConference<\/td>\nMeyer,Haase,Eckert,Klauer<\/td>\nA Threat-Model for Building and Home Automation, 2016 IEEE 14th International Conference on Industrial Informatics (INDIN), France<\/td>\n<\/td>\n<\/tr>\n
2016<\/td>\nConference<\/td>\nEckert,Haase,Meyer,Klauer<\/td>\nArchitectural Requirements for Constructing Hardware Supported Sandboxes, International Conference on FPGA Reconfiguration for General-Purpose Computing 2016, Hamburg, Germany<\/td>\n<\/td>\n<\/tr>\n
2016<\/td>\nConference<\/td>\nMeyer,Haase,Eckert,Klauer<\/td>\nCloudSynth – outsourcing hardware synthesis into the cloud, Proceedings of the 42st Annual Conference of the IEEE Industrial Electronics Society, Florence, Italy<\/td>\n<\/td>\n<\/tr>\n
2016<\/td>\nConference<\/td>\nMeyer,Haase,Eckert,Klauer<\/td>\nDigital Hardware Synthesis as a Cloud Service, 2016 Forum on Specification and Design Languages (FDL), Bremen, Germany<\/td>\n<\/td>\n<\/tr>\n
2015<\/td>\nPhD Thesis<\/td>\nMeyer<\/td>\nMulticore Reconfiguration Platform – A Research and Evaluation FPGA Framework for Runtime Reconfigurable Systems, Helmut-Schmidt-University Hamburg, Hamburg<\/td>\n<\/td>\n<\/tr>\n
2015<\/td>\nConference<\/td>\nMeyer,Haase,Eckert,Klauer<\/td>\nClock Speed Optimization of Partial Runtime Reconfigurable Systems by Signal Latency Measurement, Proceedings of the 41st Annual Conference of the IEEE Industrial Electronics Society, Yokohama, Japan<\/td>\n<\/td>\n<\/tr>\n
2014<\/td>\nPhD Thesis<\/td>\nEckert<\/td>\nFPGA-Based System Virtual Machines, Helmut-Schmidt-University Hamburg, Holstenhofweg 85, 22043 Hamburg<\/td>\n<\/td>\n<\/tr>\n
2014<\/td>\nConference<\/td>\nHaase,Meyer,Eckert<\/td>\nTowards Smart Building Automation for Private Homes, Conference: Erste transdisziplinaere Konferenz zum Thema „Technische Unterstuetzungssysteme, die die Menschen wirklich wollen“,<\/td>\n<\/td>\n<\/tr>\n
2013<\/td>\nPaper Collection<\/td>\nEckert,Podebrad,Klauer<\/td>\nHardware Based Security Enhanced Direct Memory Access, Lecture Notes in Computer Science Vol. 8, Editor: De Decker, Bart and Dittmann, Jana and Kraetzer, Christian and Vielhauer, Claus<\/td>\n<\/td>\n<\/tr>\n
2013<\/td>\nChapter in Book<\/td>\nKlauer<\/td>\nChap: The Convey Hybrid-Core Architecture, Book: High-Performance Computing Using FPGAs, Editor: Vanderbauwhede, Wim AND Benkrid, Khaled, Springer Science & Business Media<\/td>\n<\/td>\n<\/tr>\n
2013<\/td>\nConference<\/td>\nMeyer,Eckert,Klauer<\/td>\nCEB approach reduces the granularity problem of Runtime Reconfigurable System Design Flows, Proceedings of the Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, Edinburgh, Scotland<\/td>\n<\/td>\n<\/tr>\n
2011<\/td>\nJournal<\/td>\nWippig,Klauer<\/td>\nGPU-based translation-invariant 2d discrete wavelet transform for image processing, International Journal of Computers Issue 2 Vol. 5, NAUN<\/td>\n<\/td>\n<\/tr>\n
2011<\/td>\nJournal<\/td>\nMeyer,Klauer<\/td>\nMulticore reconfiguration platform an alternative to RAMPSoC, SIGARCH Comput. Archit. News Issue 4 Vol. 39, ACM<\/td>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

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Year Type Authors Publication 2017 Conference Eckert,Meyer,Klauer,Haase Comparison and evaluation of cache parameters for softcores on FPGAs, 2017 International Conference on FPGA Reconfiguration for General-Purpose Computing (FPGA4GPC), 2016 Conference Haase,Meyer,Eckert,Klauer […]<\/p>\n","protected":false},"author":58,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"categories":[7],"tags":[],"class_list":["post-133","page","type-page","status-publish","hentry","category-research"],"_links":{"self":[{"href":"https:\/\/www.hsu-hh.de\/ti\/wp-json\/wp\/v2\/pages\/133","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.hsu-hh.de\/ti\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/www.hsu-hh.de\/ti\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/www.hsu-hh.de\/ti\/wp-json\/wp\/v2\/users\/58"}],"replies":[{"embeddable":true,"href":"https:\/\/www.hsu-hh.de\/ti\/wp-json\/wp\/v2\/comments?post=133"}],"version-history":[{"count":12,"href":"https:\/\/www.hsu-hh.de\/ti\/wp-json\/wp\/v2\/pages\/133\/revisions"}],"predecessor-version":[{"id":979,"href":"https:\/\/www.hsu-hh.de\/ti\/wp-json\/wp\/v2\/pages\/133\/revisions\/979"}],"wp:attachment":[{"href":"https:\/\/www.hsu-hh.de\/ti\/wp-json\/wp\/v2\/media?parent=133"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.hsu-hh.de\/ti\/wp-json\/wp\/v2\/categories?post=133"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.hsu-hh.de\/ti\/wp-json\/wp\/v2\/tags?post=133"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}